393 lines
11 KiB
Plaintext
393 lines
11 KiB
Plaintext
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#include "convolution.h"
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#include <mpi.h>
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#include <stdio.h>
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#include <cuda_runtime.h>
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#include "util.h"
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// NVIDIA GeForce RTX 3090
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// - Computing capability: 8.6
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// - Maximum number of threads per block: 1024
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// - Maximum amount of shared memory per SM: 100KB
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// - Maximum amount of shared memory per thread block : 99KB
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// - Maximum amount of local memory per thread: 512KB
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// Maximum x-dimension of a grid of thread blocks: 2^31-1
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// Maximum y- or z-dimension of a grid of thread blocks: 65535
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// - In a SM:
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// 128 FP32 cores in a SM
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// 64 INT32 cores for integer math
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// 4 warp schedulers
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#define MAX_NUM_GPU 4
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#define MAX_THREAD_PER_BLOCK 8 // 16 x 16 = 256
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#define CEIL_DIV(x,y) ( ((x) + (y) - 1) / (y) )
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#define CEIL(x,y) ( CEIL_DIV((x),(y)) * (y) )
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#define MIN(a,b) ( ((a) < (b)) ? (a) : (b) )
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#define CUDA_LOG(fmt, ...) //printf(fmt, ##__VA_ARGS__)
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#define CUDA_KERN_LOG(fmt, ...) //printf(fmt, ##__VA_ARGS__)
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#define CUDA_CALL(d, f) \
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{ \
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cudaError_t err = (f); \
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if (err != cudaSuccess) { \
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fprintf(stderr, "[Node %d][GPU %d] CUDA error at [%s:%d] %d %s\n", \
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mpi_rank, (d), __FILE__, __LINE__, err, cudaGetErrorString(err)); \
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exit(1); \
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} \
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}
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static float *input, *output, *filter;
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static int N, C, H, W;
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static int K, R, S;
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static int OH, OW;
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static int pad;
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static int dilation;
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static int stride;
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static int mpi_rank, mpi_world_size;
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static int num_devices;
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// Array of device (GPU) pointers
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static float *i_d[MAX_NUM_GPU];
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static float *f_d[MAX_NUM_GPU];
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static float *o_d[MAX_NUM_GPU];
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__global__ void conv_core(float *in, float *flt, float *out,
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int N, int K, int C, int H, int W, int R, int S, int OH, int OW,
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int stride, int pad, int dilation)
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{
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const int col = threadIdx.x;
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const int row = threadIdx.y;
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const int globalCol = blockDim.x * blockIdx.x + col;
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const int globalRow = blockDim.y * blockIdx.y + row;
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if (globalCol < OW && globalRow < OH)
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{
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for (int n = 0; n < N; ++n)
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{
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for (int k = 0; k < K; ++k)
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{
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float *outForK = &out[n * K * OH * OW + k * OH * OW];
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float o = 0.0f;
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for (int c = 0; c < C; ++c)
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{
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float *inForC = &in[n * C * H * W + c * H * W];
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float *fltForC = &flt[k * C * R * S + c * R * S];
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for (int r = 0; r < R; r++)
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{
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for (int s = 0; s < S; s++)
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{
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int h = globalRow * stride - pad + r * dilation;
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int w = globalCol * stride - pad + s * dilation;
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if (h < 0 || h >= H || w < 0 || w >= W) continue;
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float i = inForC[h * W + w];
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float f = fltForC[r * S + s];
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o += i * f;
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// printf("GR:%03d, GC:%03d, OH:%03d, OW:%03d, C:%03d, R:%03d, S:%03d, H:%03d, W:%03d, I:%f, F:%f, O:%f\n",
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// globalRow, globalCol, oh, ow, c, r, s, h, w, i, f, o);
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}
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}
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}
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outForK[globalRow * OW + globalCol] = o;
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CUDA_KERN_LOG("N:%03d, K:%03d, GR:%03d, GC:%03d, o:%p, o:%f\n",
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n, k, globalRow, globalCol,
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&outForK[globalRow * OW + globalCol], outForK[globalRow * OW + globalCol]);
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}
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}
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}
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}
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#define MPI_ASYNC 1
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void convolution(
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float *_input, float *_output, float *_filter,
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int _N, int _C, int _H, int _W,
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int _K, int _R, int _S,
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int _pad, int _dilation, int _stride)
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{
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#if MPI_ASYNC == 1
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MPI_Request reqs[3] = { MPI_REQUEST_NULL, MPI_REQUEST_NULL, MPI_REQUEST_NULL };
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#endif
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const int slicedN = _N / mpi_world_size;
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////////////////////////////////////////////////////////////////////////////////
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// scatter
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if (mpi_rank == 0)
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{
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input = _input;
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output = _output;
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filter = _filter;
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}
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if (slicedN > 0)
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{
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#if MPI_ASYNC == 1
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MPI_Ibcast(filter, K * C * R * S, MPI_FLOAT, 0, MPI_COMM_WORLD, &reqs[0]);
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#else
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MPI_Bcast(filter, K * C * R * S, MPI_FLOAT, 0, MPI_COMM_WORLD);
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#endif
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if (mpi_rank == 0)
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{
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const int sizeOfN = slicedN * C * H * W;
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float *inputForNodes = input + (N * C * H * W);
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for (int i = 1; i < mpi_world_size; i++)
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{
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#if MPI_ASYNC == 1
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MPI_Isend(inputForNodes + sizeOfN * (i - 1), sizeOfN, MPI_FLOAT, i, 1, MPI_COMM_WORLD, &reqs[1]);
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#else
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MPI_Send(inputForNodes + sizeOfN * (i - 1), sizeOfN, MPI_FLOAT, i, 1, MPI_COMM_WORLD);
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#endif
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}
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}
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else
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{
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#if MPI_ASYNC == 1
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MPI_Irecv(input, N * C * H * W, MPI_FLOAT, 0, 1, MPI_COMM_WORLD, &reqs[1]);
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#else
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MPI_Recv(input, N * C * H * W, MPI_FLOAT, 0, 1, MPI_COMM_WORLD, MPI_STATUS_IGNORE);
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#endif
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// zero_tensor(output, N, K, OH, OW);
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}
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#if MPI_ASYNC == 1
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MPI_Waitall(2, reqs, MPI_STATUSES_IGNORE);
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#endif
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}
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////////////////////////////////////////////////////////////////////////////////
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// calc
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int slicedK = K / num_devices;
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int startK[MAX_NUM_GPU];
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int sizeK[MAX_NUM_GPU];
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for (int d = 0; d < num_devices; d++)
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{
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startK[d] = slicedK * d;
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sizeK[d] = slicedK;
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}
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sizeK[num_devices - 1] = K - startK[num_devices - 1];
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for (int d = 0; d < num_devices; d++)
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{
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if (N <= 0 || sizeK[d] <= 0)
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{
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continue;
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}
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CUDA_CALL( d, cudaSetDevice(d) );
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// Upload input data to every GPU
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CUDA_LOG("[Node %d][GPU %d] CopyToDev: i_d=%p, input=%p, size=%lu(0x%lX)\n",
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mpi_rank, d, i_d[d], input, N * C * H * W * sizeof(float), N * C * H * W * sizeof(float));
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CUDA_CALL( d, cudaMemcpyAsync(i_d[d], input,
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N * C * H * W * sizeof(float),
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cudaMemcpyHostToDevice) );
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// Upload filter data to every GPU
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CUDA_LOG("[Node %d][GPU %d] CopyToDev: f_d=%p, filter=%p, size=%lu(0x%lX)\n",
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mpi_rank, d, f_d[d], &filter[startK[d] * C * R * S], sizeK[d] * C * R * S * sizeof(float), sizeK[d] * C * R * S * sizeof(float));
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CUDA_CALL( d, cudaMemcpyAsync(f_d[d], &filter[startK[d] * C * R * S],
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sizeK[d] * C * R * S * sizeof(float),
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cudaMemcpyHostToDevice) );
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// Launch kernel on every GPU
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dim3 blockDim(MAX_THREAD_PER_BLOCK, MAX_THREAD_PER_BLOCK, 1);
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dim3 gridDim(CEIL_DIV(OW, MAX_THREAD_PER_BLOCK), CEIL_DIV(OH, MAX_THREAD_PER_BLOCK), 1);
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CUDA_LOG("[Node %d][GPU %d] KickKernel: i_d=%p, f_d=%p, o_d=%p"
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", N=%d, sizeK[d]=%d, C=%d, H=%d, W=%d, R=%d, S=%d, OH=%d, OW=%d"
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", stride=%d, pad=%d, dilation=%d\n",
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mpi_rank, d, i_d[d], f_d[d], o_d[d],
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N, sizeK[d], C, H, W, R, S, OH, OW,
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stride, pad, dilation);
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conv_core<<<gridDim, blockDim>>>(i_d[d], f_d[d], o_d[d],
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N, sizeK[d], C, H, W, R, S, OH, OW,
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stride, pad, dilation);
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}
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// Download output data from GPUs
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for (int d = 0; d < num_devices; d++)
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{
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if (N <= 0 || sizeK[d] <= 0)
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{
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continue;
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}
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CUDA_CALL( d, cudaSetDevice(d) );
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for (int n = 0; n < N; n++)
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{
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CUDA_LOG("[Node %d][GPU %d] CopyFromDev output=%p, o_d=%p, size=%lu(0x%lX)\n",
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mpi_rank, d, &output[(n * K * OH * OW) + (startK[d] * OH * OW)], o_d[d] + n * sizeK[d] * OH * OW,
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sizeK[d] * OH * OW * sizeof(float), sizeK[d] * OH * OW * sizeof(float));
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CUDA_CALL( d, cudaMemcpyAsync(&output[(n * K * OH * OW) + (startK[d] * OH * OW)],
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o_d[d] + n * sizeK[d] * OH * OW,
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sizeK[d] * OH * OW * sizeof(float),
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cudaMemcpyDeviceToHost) );
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}
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}
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for (int d = 0; d < num_devices; d++)
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{
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CUDA_CALL( d, cudaDeviceSynchronize() );
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}
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////////////////////////////////////////////////////////////////////////////////
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// gather
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if (slicedN > 0)
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{
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if (mpi_rank == 0)
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{
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const int sizeOfN = slicedN * K * OH * OW;
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float *outputForNodes = output + (N * K * OH * OW);
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for (int i = 1; i < mpi_world_size; i++)
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{
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#if MPI_ASYNC == 1
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MPI_Irecv(outputForNodes + sizeOfN * (i - 1), sizeOfN, MPI_FLOAT, i, 2, MPI_COMM_WORLD, &reqs[2]);
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#else
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MPI_Recv(outputForNodes + sizeOfN * (i - 1), sizeOfN, MPI_FLOAT, i, 2, MPI_COMM_WORLD, MPI_STATUS_IGNORE);
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#endif
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}
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}
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else
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{
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#if MPI_ASYNC == 1
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MPI_Isend(output, N * K * OH * OW, MPI_FLOAT, 0, 2, MPI_COMM_WORLD, &reqs[2]);
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#else
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MPI_Send(output, N * K * OH * OW, MPI_FLOAT, 0, 2, MPI_COMM_WORLD);
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#endif
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}
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#if MPI_ASYNC == 1
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MPI_Wait(&reqs[2], MPI_STATUS_IGNORE);
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#endif
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}
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}
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void convolution_init(
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int _N, int _C, int _H, int _W,
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int _K, int _R, int _S,
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int _pad, int _dilation, int _stride)
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{
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C = _C; H = _H; W = _W;
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K = _K; R = _R; S = _S;
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pad = _pad;
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dilation = _dilation;
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stride = _stride;
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OH = (H + 2 * pad - dilation * (R - 1) - 1) / stride + 1;
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OW = (W + 2 * pad - dilation * (S - 1) - 1) / stride + 1;
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MPI_Comm_rank(MPI_COMM_WORLD, &mpi_rank);
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MPI_Comm_size(MPI_COMM_WORLD, &mpi_world_size);
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N = _N / mpi_world_size;
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if (mpi_rank == 0)
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{
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N = _N - N * (mpi_world_size - 1);
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}
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else
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{
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if (N > 0)
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{
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alloc_tensor(&input, N, C, H, W);
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alloc_tensor(&filter, K, C, R, S);
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alloc_tensor(&output, N, K, OH, OW);
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}
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}
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CUDA_CALL( 0, cudaGetDeviceCount(&num_devices) );
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if (num_devices > MAX_NUM_GPU)
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{
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num_devices = MAX_NUM_GPU;
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}
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if (num_devices <= 0)
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{
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printf("[Node %d] No CUDA device found. Aborting\n", mpi_rank);
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exit(1);
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}
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if (N > 0)
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{
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// Allocate device memory for each GPU
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for (int d = 0; d < num_devices; d++)
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{
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CUDA_CALL( d, cudaSetDevice(d) );
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CUDA_CALL( d, cudaMalloc(&i_d[d], sizeof(float) * CEIL(N * C * H * W, 8)) ); // 32 64 256 256
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CUDA_CALL( d, cudaMalloc(&f_d[d], sizeof(float) * CEIL(K * C * R * S, 8)) ); // 64 64 16 16
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CUDA_CALL( d, cudaMalloc(&o_d[d], sizeof(float) * CEIL(N * K * OH * OW, 8)) ); // 32 64 256 256
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}
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for (int d = 0; d < num_devices; d++)
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{
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CUDA_CALL( d, cudaSetDevice(d) );
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||
|
|
CUDA_CALL( d, cudaDeviceSynchronize() );
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void convolution_final(
|
||
|
|
int _N, int _C, int _H, int _W,
|
||
|
|
int _K, int _R, int _S,
|
||
|
|
int _pad, int _dilation, int _stride)
|
||
|
|
{
|
||
|
|
// CUDA
|
||
|
|
if (N > 0)
|
||
|
|
{
|
||
|
|
for (int d = 0; d < num_devices; d++)
|
||
|
|
{
|
||
|
|
CUDA_CALL( d, cudaDeviceSynchronize() );
|
||
|
|
}
|
||
|
|
|
||
|
|
for (int d = 0; d < num_devices; d++)
|
||
|
|
{
|
||
|
|
CUDA_CALL( d, cudaSetDevice(d) );
|
||
|
|
|
||
|
|
CUDA_CALL( d, cudaFree(i_d[d]) );
|
||
|
|
CUDA_CALL( d, cudaFree(f_d[d]) );
|
||
|
|
CUDA_CALL( d, cudaFree(o_d[d]) );
|
||
|
|
}
|
||
|
|
|
||
|
|
for (int d = 0; d < num_devices; d++)
|
||
|
|
{
|
||
|
|
CUDA_CALL( d, cudaDeviceSynchronize() );
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
// MPI
|
||
|
|
MPI_Barrier(MPI_COMM_WORLD);
|
||
|
|
|
||
|
|
if (N > 0)
|
||
|
|
{
|
||
|
|
if (mpi_rank != 0)
|
||
|
|
{
|
||
|
|
free(input);
|
||
|
|
free(filter);
|
||
|
|
free(output);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|