chundoong-lab-ta/SamsungDS22/submissions/HW6/taewan95.kim/mat_mul.cu

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#include "mat_mul.h"
#include <cstdio>
#include <cuda_runtime.h>
#define CUDA_CALL(f) \
{ \
cudaError_t err = (f); \
if (err != cudaSuccess) { \
fprintf(stderr, "CUDA error at [%s:%d] %d %s\n", __FILE__, __LINE__, \
err, cudaGetErrorString(err)); \
exit(1); \
} \
}
#define MAX_NUM_GPU 4
#define TS 32
#define WPT 32
#define RTS 1
#define TSM TS
#define TSN TS
#define TSK TS
#define CEIL_DIV(x,y) (((x) + (y) - 1) / (y))
#define PADDINGX TS
#define PADDINGY TS
int num_devices = 0;
__global__ void sgemm(float *A, float *B, float *C, int M, int N, int K) {
const int row = threadIdx.x;
const int col = threadIdx.y;
const int global_row = ( blockDim.x * WPT ) * blockIdx.x + threadIdx.x;
const int global_col = blockDim.y * blockIdx.y + threadIdx.y;
__shared__ float Asub[TS][TS];
__shared__ float Bsub[TS][TS];
float Csub[WPT];
for (int w = 0; w < WPT; w++) {
Csub[w] = 0.0f;
}
const int num_tiles = (K + TS - 1) / TS;
for (int t = 0; t < num_tiles; t++) {
#pragma unroll
for (int w = 0; w < WPT; w++) {
const int t_row = TS * t + row;
const int t_col = TS * t + col;
Asub[row + w*RTS][col] = A[(global_row + w*RTS) * K + t_col];
Bsub[row + w*RTS][col] = B[(t_row + w*RTS) * N + global_col];
}
__syncthreads();
for (int k = 0; k < TS; k++) {
for (int w = 0; w < WPT; w++) {
Csub[w] += Asub[row + w*RTS][k] * Bsub[k][col];
}
}
__syncthreads();
}
#pragma unroll
for (int w = 0; w < WPT; w++) {
C[(global_row + w*RTS) * N + global_col] = Csub[w];
}
}
// Pad the P * Q matrix with zeroes to form a P_XL * Q_XL matrix
__global__ void paddingAddZeroes(const int P, const int Q,
const float* input,
const int P_XL, const int Q_XL,
float* output) {
const int tx = blockIdx.x * blockDim.x + threadIdx.x;
const int ty = blockIdx.y * blockDim.y + threadIdx.y;
// Check whether we are within bounds of the XL matrix
if (tx < P_XL && ty < Q_XL) {
// Copy the input or pad a zero
float value;
if (tx < P && ty < Q) {
value = input[tx*Q + ty];
}
else {
value = 0.0f;
}
output[tx*Q_XL + ty] = value;
}
}
// Remove padded values from a P_XL * Q_XL matrix to form a P * Q matrix
__global__ void paddingRemoveZeroes(const int P_XL, const int Q_XL,
const float* input,
const int P, const int Q,
float* output) {
const int tx = blockIdx.x * blockDim.x + threadIdx.x;
const int ty = blockIdx.y * blockDim.y + threadIdx.y;
// Only store the result if within P * Q bounds
if (tx < P && ty < Q) {
output[tx*Q + ty] = input[tx*Q_XL + ty];
}
}
// Array of device (GPU) pointers
static float *a_d[MAX_NUM_GPU];
static float *b_d[MAX_NUM_GPU];
static float *c_d[MAX_NUM_GPU];
static float *a_ad[MAX_NUM_GPU];
static float *b_ad[MAX_NUM_GPU];
static float *c_ad[MAX_NUM_GPU];
static int M, N, K;
static int Mbegin[MAX_NUM_GPU], Mend[MAX_NUM_GPU];
static int K_XL;
static int M_XL[MAX_NUM_GPU];
static int N_XL;
void mat_mul(float *_A, float *_B, float *_C, int _M, int _N, int _K) {
// Launch kernel on every GPU
for (int i = 0; i < num_devices; i++) {
int m_size = Mend[i] - Mbegin[i];
dim3 blockDim(TS/WPT, TS, 1);
dim3 gridDim(((m_size + TS - 1) / TS), (N+TS-1)/TS, 1);
dim3 blockDimAll(TS, TS, 1);
dim3 gridDimA((M_XL[i] + TS - 1)/TS, (K_XL + TS - 1) / TS, 1);
dim3 gridDimB((K_XL + TS - 1) / TS, (N_XL + TS - 1) / TS, 1);
dim3 gridDimC((M_XL[i] + TS - 1) / TS, (N_XL + TS - 1) / TS, 1);
CUDA_CALL( cudaSetDevice(i) );
// add zero padding
paddingAddZeroes<<<gridDimA, blockDimAll>>>(m_size, K, a_d[i], M_XL[i], K_XL, a_ad[i]);
paddingAddZeroes<<<gridDimB, blockDimAll>>>(K, N, b_d[i], K_XL, N_XL, b_ad[i]);
// calculate matrix multiplication
sgemm<<<gridDim, blockDim>>>(a_ad[i], b_ad[i], c_ad[i], M_XL[i], N_XL, K_XL);
// remove zero padding
paddingRemoveZeroes<<<gridDimC, blockDimAll>>>(M_XL[i], N_XL, c_ad[i], m_size, N, c_d[i]);
}
// DO NOT REMOVE; NEEDED FOR TIME MEASURE
for (int i = 0; i < num_devices; i++) {
CUDA_CALL( cudaDeviceSynchronize() );
}
}
void mat_mul_init(float *A, float *B, float *C, int _M, int _N, int _K) {
M = _M, N = _N, K = _K;
int slice = M / MAX_NUM_GPU, m_size;
K_XL = CEIL_DIV(K, TSK) * TSK;
N_XL = CEIL_DIV(N, TSN) * TSN;
CUDA_CALL( cudaGetDeviceCount(&num_devices) );
printf("Using %d devices\n", num_devices);
for (int i = 0; i < num_devices; i++) {
cudaDeviceProp prop;
CUDA_CALL( cudaGetDeviceProperties(&prop, i) );
// Try printing more detailed information here
printf("[GPU %d] %s\n", i, prop.name);
}
if (num_devices <= 0) {
printf("No CUDA device found. Aborting\n");
exit(1);
}
if (M < 4) {
num_devices = M;
}
slice = M / num_devices;
// Setup problem size for each GPU
for (int i = 0; i < num_devices; i++) {
Mbegin[i] = slice * i;
Mend[i] = (i == num_devices - 1) ? M : slice * (i + 1);
m_size = Mend[i] - Mbegin[i];
M_XL[i] = CEIL_DIV(m_size, TSM) * TSM;
}
// Allocate device memory for each GPU
for (int i = 0; i < num_devices; i++) {
m_size = Mend[i] - Mbegin[i];
CUDA_CALL( cudaSetDevice(i) );
//
CUDA_CALL( cudaMalloc(&a_d[i], m_size * K * sizeof(float)) );
CUDA_CALL( cudaMalloc(&b_d[i], K * N * sizeof(float)) );
CUDA_CALL( cudaMalloc(&c_d[i], m_size * N * sizeof(float)) );
// zero padding
CUDA_CALL( cudaMalloc(&a_ad[i], M_XL[i] * K_XL * sizeof(float)) );
CUDA_CALL( cudaMalloc(&b_ad[i], K_XL * N_XL * sizeof(float)) );
CUDA_CALL( cudaMalloc(&c_ad[i], M_XL[i] * N_XL * sizeof(float)) );
}
// Upload A and B matrix to every GPU
for (int i = 0; i < num_devices; i++) {
CUDA_CALL( cudaMemcpy(a_d[i], A + Mbegin[i] * K,
(Mend[i] - Mbegin[i]) * K * sizeof(float),
cudaMemcpyHostToDevice) );
CUDA_CALL( cudaMemcpy(b_d[i], B, K * N * sizeof(float), cudaMemcpyHostToDevice) );
}
// DO NOT REMOVE; NEEDED FOR TIME MEASURE
for (int i = 0; i < num_devices; i++) {
CUDA_CALL( cudaDeviceSynchronize() );
}
}
void mat_mul_final(float *A, float *B, float *C, int M, int N, int K) {
// Do any post-matmul cleanup work here.
// Download C matrix from GPUs
for (int i = 0; i < num_devices; i++) {
CUDA_CALL( cudaMemcpy(C + Mbegin[i] * N, c_d[i],
(Mend[i] - Mbegin[i]) * N * sizeof(float),
cudaMemcpyDeviceToHost) );
}
// DO NOT REMOVE; NEEDED FOR TIME MEASURE
for (int i = 0; i < num_devices; i++) {
CUDA_CALL( cudaDeviceSynchronize() );
}
}