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basic/missing-syscall: add numbers for riscv (64-bit)

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Zbigniew Jędrzejewski-Szmek
2021-04-28 03:34:38 +08:00
parent 94dfd85b0c
commit 302beee342
4 changed files with 624 additions and 0 deletions
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src/basic/missing_syscalls.py
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@@ -69,6 +69,8 @@ DEF_TEMPLATE_B = '''\
# endif
# elif defined(__powerpc__)
# define systemd_NR_{syscall} {nr_powerpc}
# elif defined(__riscv) && defined(__LP64__)
# define systemd_NR_{syscall} {nr_riscv64}
# elif defined(__s390__)
# define systemd_NR_{syscall} {nr_s390}
# elif defined(__sparc__)